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Computer Organization Fall 2008

Lect # Tuesday Thursday

1 8/26 Sections 1.1 - 1.4: Intro. to Computer Organization 8/28 Sections 1.5, 2.1-2.3: Computer History; Binary and Hexadecimal number systems; Unsigned Integers

3 9/2 Section 2.4: Signed Integers: two's complement 9/4 Section 2.5: IEEE 754 Floating Point

5 9/9 Sections 2.5: Floating Point Range, Precision, and Accuracy 9/11 Sections 2.6-2.7: Characters; Error Correction and Detection

7 9/16 Sections 3.1-3.3: Boolean Algebra; Logical Gates 9/18 Section 3A: K-maps

9 9/23 Section 3.4-3.5: Common Combinational Circuits 9/25 Section 3.6: 1-bit latches, Timing Diagrams

11 9/30 Section: 3.6: 1-bit latches, Timing Diagrams 10/2

13 10/7 Section: 3.6: Flip-Flops, Registers, Register File
Review for Test 1
10/9 Test 1

15 10/14 Square Memory implementation of RAM 10/16 Section 4.1- 4.7:CPU, Bus, Clock, I/O, Memory, Interrupts, and Intro. to MARIE

17 10/21 Section 4.8-4.10: MARIE, Fetch-decode-execute cycle, Simple MARIE AL programming 10/23 Section 4.11-4.13: MARIE assembly-language programming practice,
Hardwired control unit

19 10/28 Section 4.13: MARIE Microprogrammed Control Unit 10/30 Section 4.14: Intel x86 (CISC), MIPS (RISC) architectures, MIPS assembly language introduction

21 11/4 MIPS practice, arrays, walking pointers 11/6 MIPS practice

23 11/11 Run-time stack and Test 2 review 11/13 Test 2

25 11/18 Examples using MIPS calling conventions and
11/20 MIPs calling conventions

Thanksgiving Break - November 24-28

27 12/2 PCSpim System calls 12/4 MIPS logical and shifting instructions

29 12/9 Hardware Support for Operating System 12/11 Hardware Support for Operating System

Final: Tuesday, December 16 from 8-9:50 AM in ITT 328

Lect #	Tuesday		Thursday
1	8/26	Sections 1.1 - 1.4: Intro. to Computer Organization	8/28	Sections 1.5, 2.1-2.3: Computer History; Binary and Hexadecimal number systems; Unsigned Integers
3	9/2	Section 2.4: Signed Integers: two's complement	9/4	Section 2.5: IEEE 754 Floating Point
5	9/9	Sections 2.5: Floating Point Range, Precision, and Accuracy	9/11	Sections 2.6-2.7: Characters; Error Correction and Detection
7	9/16	Sections 3.1-3.3: Boolean Algebra; Logical Gates	9/18	Section 3A: K-maps
9	9/23	Section 3.4-3.5: Common Combinational Circuits	9/25	Section 3.6: 1-bit latches, Timing Diagrams
11	9/30	Section: 3.6: 1-bit latches, Timing Diagrams	10/2
13	10/7	Section: 3.6: Flip-Flops, Registers, Register File Review for Test 1	10/9	Test 1
15	10/14	Square Memory implementation of RAM	10/16	Section 4.1- 4.7:CPU, Bus, Clock, I/O, Memory, Interrupts, and Intro. to MARIE
17	10/21	Section 4.8-4.10: MARIE, Fetch-decode-execute cycle, Simple MARIE AL programming	10/23	Section 4.11-4.13: MARIE assembly-language programming practice, Hardwired control unit
19	10/28	Section 4.13: MARIE Microprogrammed Control Unit	10/30	Section 4.14: Intel x86 (CISC), MIPS (RISC) architectures, MIPS assembly language introduction
21	11/4	MIPS practice, arrays, walking pointers	11/6	MIPS practice
23	11/11	Run-time stack and Test 2 review	11/13	Test 2
25	11/18	Examples using MIPS calling conventions and	11/20	MIPs calling conventions
Thanksgiving Break - November 24-28
27	12/2	PCSpim System calls	12/4	MIPS logical and shifting instructions
29	12/9	Hardware Support for Operating System	12/11	Hardware Support for Operating System
Final: Tuesday, December 16 from 8-9:50 AM in ITT 328