If you are in Section 1 (class time at 12:30 on TTh), your Final is Thursday (5/8) 3-4:50 PM.
If you are in Section 2 (class time at 2:00 on TTh), your Final is Wednesday (5/7) 1-2:50 PM.
The Final will be closed book and notes, except for one 8.5" x 11" sheet of paper with notes and the orange ARM Quick Reference Card.
The Fall will be comprehensive with
Material covered after Test 2
Chapter 4.
Types of I/O: programmed I/O, interrupt-driven I/O, and direct-memory access (DMA)
I/O interface module: operation and function
Ways to address I/O devices: memory-mapped I/O and special I/O instructions ("isolated I/O")
Interrupts
Hardware Suport for Operating systems:
1) Dual-mode execution - system and user modes, mode bit(s) in the processor status register
privileged instructions with run-time checking by CPU
2) Restricting a program to its memory space
3) Protection from a user program in an infinite loop - CPU timer
Buses - address, data, and control wires
Synchronous and asynchronous communication protocols
Chapter 5.
Memory hierarchy: levels and goals (speed, capacity, and cost)
Locality of reference (temporal and spatial)
Idea of cache and virtual memory
RAM: static and dynamic
Motivation for "square-memory" array of bits on a memory chip
Advanced DRAM Organizations of Synchronous DRAM
Cache: types (direct mapped, fully associative, set associative); replacement (LRU and random)
Write policies (write-through, write-back)
Unified vs. split cache
Pentium IV example
Magnetic disk- organizaton/format; characteristics; access time (seek time, rotational delay/latency)
Chapter 6. Sections 6.3 - 6.5, 6.7 since Test 2
Multiplication of positive integer numbers
Booth's algorithm for two's complement signed numbers
Bit-Pair Recoding of recoding to speed up Booth's algorithm
IEEE 754 Floating Point standard: normalized and denormal numbers