Computer Organization Lectures for Spring 2006
|
Lecture # |
Date |
Lecture Topic |
Handouts/Overheads |
|
29 |
4/20 |
Buses: parallel vs. serial, dedicated vs. time-multiplexed data & address , bus operations; synchronous and asynchronous: timing diagrams and protocols |
|
|
28 |
4/18 |
Magnetic Disk, RAID arrays |
|
|
26 |
4/13 |
I/O controller/modules, types of I/O (programmed-I/O, interrupt-driven I/O, DMA), issuing I/O commands (isolated-I/O vs. memory-mapped I/O) |
|
|
24 |
4/6 |
Hardware support for the operating system and process |
|
|
22 |
3/30 |
Using logical and shift instructions: Booth's Algorithm for Matrix Multiplication |
|
|
21 |
3/28 |
Register conventions – MergeSort example (can do for extra credit) Shift/Rotate Instructions & Logical Instructions |
|
|
20 |
3/23 |
Test 2 |
|
|
19 |
3/21 |
Review for Test 2 |
|
|
18 |
3/9 |
I/O using PC-Spim, Shifting and logical instructions |
|
|
17 |
3/7 |
More Practice using the register conventions |
|
|
16 |
3/2 |
MIPS register conventions |
|
|
15 |
2/28 |
High-level languages and the Run-time stack |
|
|
14 |
2/23 |
Work on writing MIPS code |
|
|
13 |
2/21 |
Work on writing MIPS code |
|
|
12 |
2/16 |
Intro to Assembly Language |
|
|
11 |
2/14 |
|
|
|
10 |
2/9 |
Test 1 |
|
|
9 |
2/7 |
Signed Numbers and Floating point representation |
|
|
8 |
2/2 |
Dynamic RAM and square-memory design Signed Binary numbers and two's complement |
|
|
7 |
1/31 |
Register File |
|
|
6 |
1/26 |
Flip-Flops and Timing Diagrams |
|
|
5 |
1/24 |
Adders and SR Latch |
|
|
4 |
1/19 |
Decoders, MUXs, and Binary numbers |
|
|
3 |
1/17 |
Minimizing Boolean Algebra using K-maps |
|
|
2 |
1/12 |
Gates and Circuits |
|
|
1 |
1/10 |
Overview of Computer Org. |
Questions, Computer Diagram, and MIPS IntroQuestions, Computer Diagram, and MIPS Intro |