Assume the branch is taken:

Time

Instructions

1

2

3

4

5

6

7

8

9

10

11

12

13

14

SUB R3, R2, R1

FI

DI

CO

FO

EI

WO

BEQZ R3, ELSE

FI

DI

CO

FO

EI

WO

ADD R4, R5, R6

FI

DI

CO

FO

(instr. 2 after branch)

FI

DI

CO

(instr. 3 after branch)

FI

DI

(instr. 4 after branch)

FI

ELSE: ADD R3, R3, R2

FI

DI

CO

FO

EI

WO

a) If the branch is taken, then there is a branch penalty of _____ cycles. (I.E., for how many cycles does an instruction not complete?)

b) If the branch is not taken and we continue to fetch instructions sequentially, then there is a branch penalty of ______ cycles.

2) Suppose that you are writing a compiler for a machine that has opcodes to statically predict whether or not branches will be taken. For each of the following HLL statements, predict whether or not the compiler should predict taken or not. (Briefly justify your answer)

a) if (x > 0) then b) if (x = 0) then c) for i := 1 to 500 do d) if (ch >= 'a' and ch <= 'z') then

end if end if end for end if

3) Answer the following questions about Branch-History Tables:

a) If the branch instruction is in the Branch-History Table, will the target address supplied correspond to the instruction that should be executed next? (Briefly justify your answer)

b) What if the instruction is a branch instruction and it is not in the Branch-History Table? (Briefly justify your answer)

c) Should the Branch-History Table contain entries for unconditional as well as conditional branch instructions? (Briefly justify your answer)