See "How Disk Compression Works" 1. How is the size of a drive's cluster determined? 2. What is the slack? (aka slack space). 3. What is a CVF? How does it maximize the utilization of storage space on a disk drive? See "How a Flatbed Scanner Works" 4. The scan head "captures light bounced off individual areas of the page, each no larger than 1/90,000 of an inch square". Discuss how this relates to the concepts of resolution (and to interpolation too, if you wish) from the class handout and c023.html Microcomputer Systems class web page. 5. What does the ADC do when a flatbed scanner is doing its job? 6. What do the light sensitive diodes do? See "Writing Data to RAM 7. The illustration in the textbook shows a bank of 8 switches in a RAM chip. What does the book say that each switch is made up of? 8. Using two different colored pens or pencils, diagram the storing of an upper case Z being stored into the computer's memory at Address Line 1 (instead of Address Line 2, as shown on page 48). The ASCII code for capital Z is 90, which is 01011010 in binary. Label the address and data lines and open transistor versus closed transistor and capacitor concepts in your diagram, as the textbook page 48 does. Label the direction of the movement and label the live color you use to indicate flow of electricity pulses, and its direction. (The book used RED as the color for electrical pulses or current on and flowing). 9. What is SRAM? How does it differ from DRAM? 10. For the diagram on pages 50-51, Reading Data from RAM, what happens to a capacitor that holds a charge, if it is connected to an address line like Address Line 2? What happens to the corresponding Data Line, such as Data line 2, as shown in the diagram? How does what happens to Data line 1 compare to what happens to Data line 2 in the diagram for the RAM that is storing 0100 0001 or the upper-case A at that location? 11. What is SDRAM and why was it designed? (See page 51). 12. For our TIC computer, which has only 256 memory addresses, how many bits would be in each row for a DRAM design. How many bits would be in each column?