Date: Thu, 25 Jan 2001 13:30:03 -0600 (CST) From: Mark Jacobson To: 810-023-01@uni.edu Subject: Office door, handouts... next quiz... Hi 023 students, Two students needed the handout for the Labs on CPU Simulator and Troubleshooting exercises that are due tommorrow in class. Copies of that handout are scotch taped to my office door, so you can pick them up at 323 Wright any time. Reminder: the Chapter One quiz must be taken by next Monday at 10 p.m. in Wright labs. If you did not get your user id and password for the Start menu; Programs; Testing; Microcomputer Systems... let me know and I can send it to you or give it to you after class. Begin reading: Chapter Two: Current PC Operating Systems The Chapter Two quiz will be available from Friday, January 26th through Monday, February 5th at 10 p.m. Chapter two covers the concepts of L1 and L2 Cache memory that were introduced yesterday in the context of the fetch/execute cycle discussion. L1 cache is Level 1 cache and is memory on the CPU chip. L2 cache is Level 2 cache and is a separate chip from the CPU (Microprocessor), but is different from RAM chips. Advertisements for computers usually state the amount of L2 cache you are getting - 128 K or 256 K or 512 K of L2 cache memory. L1 cache is usually 16K or 32K total and is divided into two separate categories. L1 code cache (8K or 16K) and L1 data cache (8K or 16K) L1 cache access is very, very, very, very fast. L2 cache access is very fast. RAM access is fairly slow. Hard Drive and diskette access is molasses in January compared to the others. Mark